Improve the efficiency of PLC operation and shorten the execution time when completing the same task

Improve PLC operating efficiency and shorten execution time when completing the same task.
Reminder: Beginners don’t need to care about the methods summarized in this article, aiming at easy-to-read and standardized programs, just complete the functional requirements.
1. Try to avoid using “double word” when you can use “word”, and try to avoid using real numbers when you can use integers.
2. Prioritize the use of redundant (other than hardware connection) IB, IW, ID, QB, QW, QD, followed by M, S;
3. Try to avoid data type conversion, and try to use it when you have to AC stores intermediate variables to reduce the number of conversions. Or reserve storage space first when programming, for example: when VW2 is used to store integers, and VW0 is not used, you can directly access the data in VW2 in the form of VD0;
4. Reduce unnecessary network scans, put It is possible to set up a conditionally executed network (especially AIW, AQW), and classify it into a subroutine for conditional calls (such as timing interrupts);
5. Use the XOR instruction to achieve arbitrary bit inversion (this instruction is slightly difficult, debugging It is more necessary to carefully align the position, and it is recommended to use binary numbers when programming);
6. Under the premise of ensuring the process requirements, appropriately reduce the frequency of interruptions;
7. The subroutine should minimize the number of conditional judgments, Standardize subroutine import and export parameters, thereby reducing code redundancy.
8. For repetitive and time-consuming tasks, they should be processed in cycles; including: assigning the initialization work to multiple cycles to complete. The sampling time of multiple PID loops is slightly different to avoid multiple interrupt calls in the same cycle and make the scanning cycle more uniform and stable.
9. For subroutine calls with less input data, you can first judge whether the input data has changed. If there is no change (for comparison methods, refer to the 48th floor), you can directly skip the subroutine, thereby reducing the scan cycle.
10. Try to arrange the bit variables in the V area in V511.7, and arrange the frequently used VB/VW/VD variables in V4095, which can shorten the program scan cycle.
11. If SM0.0 is connected in series with other signals, it only increases the program size and execution time, and has no other effect (if the network already meets the required contacts on the left, there is no need to connect SM0.0 in series);
12. When there is no need to share signals, multiple instructions placed in the same network will generate additional stack entry and exit operations (specifically, it can be converted to STL for analysis), and if it is not logically required, horizontal series connection should be avoided, so that at least One “AND” instruction can be reduced. The advantage is just that it is placed in a network, which feels a little more compact.
13. Reasonable use of immediate IO instructions (minimizeUse) to save the conversion time of PLC processing immediate instructions.
14. Try to use the calculation result memory instead of the transition memory in the calculation.

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